[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All Astera Labs jobs](https://jobs.opennash.com/companies/astera-labs/) · [Search jobs](/search/) Astera Labs · San Jose # Hardware Lab Engineer San Jose Operations Listed on Astera Labs’s official careers site. Posted April 2, 2026. Check that it is still open and apply there. [Apply on Astera Labs’s careers site →](https://job-boards.greenhouse.io/asteralabs/jobs/4674439005) [OpenNash Jobs](https://jobs.opennash.com/) / [Astera Labs](https://jobs.opennash.com/companies/astera-labs/) / Hardware Lab Engineer ## Job description Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com. ### Overview Astera Labs Inc. is seeking an experienced and self-driven Hardware Lab Engineer to join our dynamic team in developing world class connectivity products for AI infrastructure. ### Job Description This role will work closely with firmware, system validation, quality, and product engineers to support silicon bring-up, characterization, and debug activities through hands-on lab execution. The ideal candidate will have a deep understanding of circuits, hands-on experience with PCBAs and silicon test environments, and the ability to work on complex, open-ended tasks with minimal oversight. ### Key Responsibilities Setup and maintain test environments for silicon validation and characterization. Configure and update hardware, software, firmware, and applications. Replicate BKCs. - Conduct hands-on testing of silicon devices including PCIe Gen5/6/7, CXL, Ethernet, and other high-speed interfaces - Install and configure servers, including FW, BIOS, OS, and network RMA intake/triage: inspection, electrical verification, screening (including CSAM inspection), and prioritization - Manage logistics and communications with external labs - Organize, track, and distribute lab equipment, hardware, and peripherals Ad hoc PCBA rework and soldering of fine-pitch SMD components - Develop, document, and maintain lab procedures ### Required Qualifications - Bachelor's degree in Electrical Engineering, Computer Engineering, or related field 5-12+ years of hands-on experience in lab environments supporting silicon validation or hardware development - Proficiency with high-speed test equipment (oscilloscopes, protocol analyzers, BERTs, multimeters) Experience with high-speed interface testing (PCIe, CXL, DDR, Ethernet, or SerDes) - Strong programming skills in Python for test automation - Familiarity with Linux operating systems and command-line tools - Demonstrated experience coordinating with third-party testing laboratories and managing logistics, including sample shipping, chain of custody, and scheduling - Strong organizational skills for managing multiple RMA cases simultaneously and prioritizing based on severity/impact ### Preferred Qualifications Experience with post-silicon validation of ASICs, SoCs, or Retimer/PHY products - Knowledge of analog/mixed-signal circuit testing and debugging techniques Experience with JTAG, I2C, SPI, and other embedded interfaces - Familiarity with PCB design, schematic reading, and signal integrity concepts - Knowledge of data center systems architecture (servers, AI platforms, networking equipment) Understanding of ATE (Automated Test Equipment) systems and production test methodologies Experience with defect screening methodologies including visual inspection, electrical testing, and acoustic imaging Experience with complete RMA lifecycle management from intake through root cause analysis and corrective action - Knowledge of common semiconductor failure modes and failure analysis techniques including die attach inspection, delamination detection, void analysis, and crack identification Experience with formal compliance testing and industry standards The base salary range is $160,000.00 USD – $200,000.00 USD. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities. ## At a glance - Posted by the employer: Apr 2, 2026 - First seen by OpenNash: Jul 12, 2026 - Last checked: Oct 18, 2026 - Listed for: 199 days - Location: San Jose[Apply on Astera Labs’s careers site →](https://job-boards.greenhouse.io/asteralabs/jobs/4674439005) ## More jobs at Astera Labs ### [(Sr.) Principal Engineer - Field Applications](https://jobs.opennash.com/companies/astera-labs/jobs/b3d9698444b34bdad944/) San Jose ### [Active Electric Cable / Smart Cable Module Lead, AVP](https://jobs.opennash.com/companies/astera-labs/jobs/5729079b36b918beca94/) San Jose ### [Applications Engineering Manager - Ethernet](https://jobs.opennash.com/companies/astera-labs/jobs/ec4146ac75f324fcad12/) San Jose ### [Distinguished Formal Verification](https://jobs.opennash.com/companies/astera-labs/jobs/8acc4f006011f2371073/) San Jose ### [Fabric Modeling and Analysis Engineer for Scale Up Fabric](https://jobs.opennash.com/companies/astera-labs/jobs/0443cc7ea898148d1e5f/) San Jose ## Similar jobs at other companies ### [Support Engineer / Hardware Lab & Board Rework Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/d1b98f3f9692a7c42cd4/) Qualcomm · Chennai, Tamil Nādu, India ### [Hardware Systems Engineer - Integrated Hardware Solutions](https://jobs.opennash.com/companies/lockheed-martin/jobs/c074459d6bd6a9f88a17/) Lockheed Martin · Montreal, CAN, Dartmouth, Victoria, Ottawa ### [Internship - Lab Verification Engineer in the AMS Lab of the Development Center Villach (f/m/div)](https://jobs.opennash.com/companies/infineon-technologies/jobs/2af97ef9d79eb944468e/) Infineon Technologies · Villach ### [Hardware Systems Engineer - Hardware Product Solution Lead](https://jobs.opennash.com/companies/lockheed-martin/jobs/0e2060351f9864283e1f/) Lockheed Martin · Montreal, CAN, Dartmouth, Victoria, Ottawa ### [Tactical Communications Lab Test Engineer](https://jobs.opennash.com/companies/airbus/jobs/f3a9599c874400d3c949/) AIRBUS · Getafe Area OpenNash lists jobs from employers’ own careers sites and does not handle applications. Dates come from the employer where stated; “first seen” and “last checked” are our own observations. OpenNash Jobs · Official listings with dates and links to the employer. [Weekly hiring report](/reports/hiring/) · [Methodology](/methodology/)