[Skip to main content](#main-content)

[OpenNash Jobs](https://jobs.opennash.com/)
[Hiring report](/reports/hiring/) · [All Astera Labs jobs](https://jobs.opennash.com/companies/astera-labs/) · [Search jobs](/search/)

Astera Labs · Singapore

# Analog Mixed Signal Design Engineer

Singapore Design 

Listed on Astera Labs’s official careers site. Posted October 13, 2026. Check that it is still open and apply there.
[Apply on Astera Labs’s careers site →](https://job-boards.greenhouse.io/asteralabs/jobs/4741623005)

[OpenNash Jobs](https://jobs.opennash.com/) / [Astera Labs](https://jobs.opennash.com/companies/astera-labs/) / Analog Mixed Signal Design Engineer

## Job description

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity.

The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.

### Job Description

As an Analog/Mixed-Signal IC Design Engineer, you will be part of a key team designing sophisticated advanced node CMOS products. Your responsibilities will include developing and verifying circuits such as PLL, DLL, ADC, regulators, amplifiers, TX, RX, and CDRs to meet performance targets. You will also work on analog and clocking blocks for connectivity applications, using industry-standard tools like Spectre and MATLAB.

The company seeks a highly motivated designer for this role Basic Qualifications: Pursuing a Master’s or PhD degree in EE is preferred Desired Experience: Hands-on experience in designing high-speed mixed-signal circuits including ADC/DAC data converters, RX front-end, TX driver/serializer, low-jitter PLLs, TX/RX calibration, low-jitter CLK distribution are other high-speed analog circuits is a must Have a deep understanding of biasing, band-gaps, reference circuits, opamps, comparators and other analog circuits Solid track-record for implementation of analog circuits high-speed data transmission.

Design and tapeout experience in advanced CMOS nodes (ex. 20nm or newer) is a must Solid fundamentals in detailed transistor-level design, feedback/stability analysis, and noise/jitter analysis. Knowledge of TIA design and drivers for optical applications is highly desirable Experience in RFIC design for wireless or wireline communication systems is highly desirable. Strong technical independent contributor with a proven ability to drive results.

Excellent teamwork, presentation, and documentation skills. Ability to collaborate with global teams across multiple time zones and deliver under pressure with strict deadlines. Strong experience in lab chip bring-up and debugging efforts. Relevant research publications and/or patents in analog or RF IC design. Familiarity in programming/scripting languages such as Python, Matlab, or C. Experience with PCB design. Familiarity with Verilog RTL or DSP design concepts.

Knowledge of optical transceivers. Expertise in ESD protection techniques and IC packaging methodologies. We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

## At a glance
- Posted by the employer: Oct 13, 2026
- First seen by OpenNash: Oct 18, 2026
- Last checked: Oct 18, 2026
- Listed for: 5 days
- Location: Singapore[Apply on Astera Labs’s careers site →](https://job-boards.greenhouse.io/asteralabs/jobs/4741623005)

## More jobs at Astera Labs

### [Design Verification Tech Lead- SerDes/PHY IP](https://jobs.opennash.com/companies/astera-labs/jobs/1e85866cfa743b0673c9/)

San Jose

### [Digital Design Manager](https://jobs.opennash.com/companies/astera-labs/jobs/a32528d1334120782159/)

Toronto

### [Distinguished ASIC Design Engineer](https://jobs.opennash.com/companies/astera-labs/jobs/c2c43daa38d337f1e80c/)

Germany

### [Expert IC Package Design Lead](https://jobs.opennash.com/companies/astera-labs/jobs/2c7a3a5f3fa2cab4030e/)

Tel Aviv

### [Hardware Design Engineering, Director - OEM, Silicon Validation Platforms & Rack-Scale Design - Taiwan](https://jobs.opennash.com/companies/astera-labs/jobs/54aaeeaed8cdc679a188/)

Taipei

## Similar jobs at other companies

### [Senior / Staff Engineer - Mixed Signal Verification](https://jobs.opennash.com/companies/infineon-technologies/jobs/8cf67c9f857201a2acf9/)

Infineon Technologies · Singapore

### [Senior Staff Analog Mixed Signal Design](https://jobs.opennash.com/companies/infineon-technologies/jobs/4b9345c3c4062ae6174f/)

Infineon Technologies · Bangalore BTP

### [Analog / Mixed-Signal IP DDR Design Senior Engineer - Cork, Ireland](https://jobs.opennash.com/companies/qualcomm/jobs/17fe770bb7ae9652f781/)

Qualcomm · Cork, Ireland

### [Mixed-Signal Design Verification Engineer - Cork, Ireland.](https://jobs.opennash.com/companies/qualcomm/jobs/df6bf3674fd23bf93de6/)

Qualcomm · Cork, Ireland

### [Analog Mixed Signal Design Engineer](https://jobs.opennash.com/companies/teledyne-technologies/jobs/005b20e6520fd936e343/)

Teledyne Technologies · Spain- Sevilla

OpenNash lists jobs from employers’ own careers sites and does not handle applications.
Dates come from the employer where stated; “first seen” and “last checked” are our own observations.

OpenNash Jobs · Official listings with dates and links to the employer. [Weekly hiring report](/reports/hiring/) · [Methodology](/methodology/)
