[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All Astera Labs jobs](https://jobs.opennash.com/companies/astera-labs/) · [Search jobs](/search/) Astera Labs · Tel Aviv # Physical Design Student Tel Aviv Design Listed on Astera Labs’s official careers site. Posted June 2, 2026. Check that it is still open and apply there. [Apply on Astera Labs’s careers site →](https://job-boards.greenhouse.io/asteralabs/jobs/4701792005) [OpenNash Jobs](https://jobs.opennash.com/) / [Astera Labs](https://jobs.opennash.com/companies/astera-labs/) / Physical Design Student ## Job description Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com. ### Role Overview Astera Labs is establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we are seeking a motivated Physical Design Student to join our founding local engineering team. This is a unique opportunity to kickstart your career in the semiconductor industry. Working alongside senior industry veterans, you will gain hands-on experience in backend execution and advanced methodologies for cutting-edge chips that power the world's largest AI clusters. If you are passionate about silicon hardware, eager to learn, and thrive on solving complex engineering challenges, this role offers the perfect bridge between your academic studies and a high-impact career. ### Key Responsibilities Guided Implementation & Learning - Partner with and learn from senior engineers to support the physical implementation journey, including synthesis, floorplanning, Place & Route (P&R), and Clock-Tree Synthesis (CTS) - Assist in macro-level implementation and develop hands-on skills in complex layout routing - Participate in deep-submicron process challenges under close professional mentorship ### Signoff & Design Integrity Support - Assist in running engineering checks for design integrity, including Static Timing Analysis (STA), Physical Verification (DRC/LVS), and Reliability analysis (EMIR) - Learn to apply Logic Equivalence Checking (LEC) to help guarantee design correctness Gain exposure to the rigorous flows required to ensure first-pass silicon success Scripting & Cross-Functional Collaboration Leverage and develop scripting tools to automate repetitive tasks and optimize the engineering environment - Collaborate with Architecture, Design, and DFT teams to understand how different chip design disciplines intersect Actively participate in team reviews and technical discussions to ramp up backend methodologies ### Basic Qualifications Pursuing a Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related technical field Strong academic foundation in digital systems, VLSI design, or semiconductor devices. Familiarity with Python, TCL, Bash, or Perl. Ability to work at least 2 days per week at our Haifa/Tel Aviv Center A "can-do" attitude with a passion for solving complex technical challenges Fluent in Hebrew and English with the ability to work effectively in a team environment ### Preferred Qualifications Prior experience from a previous VLSI/Hardware student position or a significant academic project in physical design/VLSI Hands-on university lab experience with industry-standard EDA tools (e.g., Synopsys Fusion Compiler/ICC2, Cadence Innovus) Understanding of basic verification concepts (STA, DRC, LVS) Fast learner with a proactive attitude and a passion for deep-tech hardware infrastructure We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities. ## At a glance - Posted by the employer: Jun 2, 2026 - First seen by OpenNash: Jul 12, 2026 - Last checked: Oct 18, 2026 - Listed for: 138 days - Location: Tel Aviv[Apply on Astera Labs’s careers site →](https://job-boards.greenhouse.io/asteralabs/jobs/4701792005) ## More jobs at Astera Labs ### [Expert IC Package Design Lead](https://jobs.opennash.com/companies/astera-labs/jobs/2c7a3a5f3fa2cab4030e/) Tel Aviv ### [Manager Design Verification](https://jobs.opennash.com/companies/astera-labs/jobs/3bd8944697933e21f105/) Tel Aviv ### [Senior/ Staff Physical Design Engineer](https://jobs.opennash.com/companies/astera-labs/jobs/acd6542ab4e567f833d2/) Tel Aviv ### [Staff Physical Design Engineer - SoC EMIR Engineer](https://jobs.opennash.com/companies/astera-labs/jobs/83d695a914e907abe2aa/) Tel Aviv ### [Staff/ Principal Design Verification Engineer](https://jobs.opennash.com/companies/astera-labs/jobs/6d3473faa7cb4a037531/) Tel Aviv ## Similar jobs at other companies ### [SoC Physical Design](https://jobs.opennash.com/companies/qualcomm/jobs/6fa8868af60ff8c39891/) Qualcomm · Bangalore, India ### [Internship - Physical Design & Integration](https://jobs.opennash.com/companies/airbus/jobs/026674141eabccc39ba9/) AIRBUS · Bangalore Area ### [CPU Physical Design Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/27bd54e804c3da2d6519/) Qualcomm · Bangalore, India ### [Physical Design Engineer II](https://jobs.opennash.com/companies/microsoft/jobs/2d7f9c2e826bc117df12/) Microsoft · India, Karnataka, Bangalore OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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