[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All Astera Labs jobs](https://jobs.opennash.com/companies/astera-labs/) · [Search jobs](/search/) Astera Labs · San Jose # Principal Hardware Validation Engineer San Jose Senior individual contributor Operations Listed on Astera Labs’s official careers site. Posted August 4, 2026. Check that it is still open and apply there. [Apply on Astera Labs’s careers site →](https://job-boards.greenhouse.io/asteralabs/jobs/4713208005) [OpenNash Jobs](https://jobs.opennash.com/) / [Astera Labs](https://jobs.opennash.com/companies/astera-labs/) / Principal Hardware Validation Engineer ## Job description Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com. As a Principal Hardware Validation Engineer you will join the Hardware Electrical Validation team at Astera Labs, linking between the Hardware Electrical Design teams and Post-Silicon Electrical Validation teams, among others. ### Note This role is not post-silicon electrical validation; it is electrical validation of PCBAs and related hardware products. ### Key Responsibilities Support the Hardware Electrical Design teams with de-risking circuits and modules from project kick-off to gerber out. Develop comprehensive hardware electrical validation plans using correct test methods and processes. Bring up the PCBAs upon arrival in the lab, and execute the electrical validation plans to validate all circuits on the board. Debug complex multi-point failures in hardware - power regulators, DPMs, clock synthesizers, digital control paths, I2C, SPI, etc. Rework components on the PCBAs to unblock debugging activities. Pre-empt and de-risk system validation architectures - collaborate with the System Validation teams. Support hardware activities in auxiliary teams - Post-Silicon Electrical Validation, Product Apps, System Validation, FAEs, etc. Support the new designs using knowledge of existing products to de-risk new features and requirements. Self-informed of new industry test standards and equipment to introduce modern testing methodologies. Specify test equipment, develop test fixtures, help improve hardware lab functions. ### Required Skills - Demonstrated strong skills in electronic circuit analysis, comprehensive testing and debug - Bachelor degree in EE with 3+ years of experience in hardware test or design Expert understanding of design and test for power regulators, PDNs, Bode, clock generators - Ability to produce test description from a schematic design, and execute and document results - Demonstrated knowledge of the full hardware product lifecycle from Project Kick-off to RTM Lab equipment for hardware test - oscilloscopes, e-loads, VNA, TDR, environmental chambers, etc. Automating lab equipment to optimize test processes, Python preferred Preferred Skills Measurements of high-speed interfaces - PCIe, DDR, 25/50G/100G SERDES, etc. EMI/EMC compliance Technical writing skills - ECOs, Bug Reports, Rework WIs, MCOs, etc. PLM, Arena or equivalent Understanding of the ASIC/silicon product development process The base salary range is $185,000 USD - $240,000 USD. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities. ## At a glance - Posted by the employer: Aug 4, 2026 - First seen by OpenNash: Oct 11, 2026 - Last checked: Oct 18, 2026 - Listed for: 75 days - Location: San Jose[Apply on Astera Labs’s careers site →](https://job-boards.greenhouse.io/asteralabs/jobs/4713208005) ## More jobs at Astera Labs ### [(Sr.) Principal Engineer - Field Applications](https://jobs.opennash.com/companies/astera-labs/jobs/b3d9698444b34bdad944/) San Jose ### [Active Electric Cable / Smart Cable Module Lead, AVP](https://jobs.opennash.com/companies/astera-labs/jobs/5729079b36b918beca94/) San Jose ### [Applications Engineering Manager - Ethernet](https://jobs.opennash.com/companies/astera-labs/jobs/ec4146ac75f324fcad12/) San Jose ### [Distinguished Formal Verification](https://jobs.opennash.com/companies/astera-labs/jobs/8acc4f006011f2371073/) San Jose ### [Fabric Modeling and Analysis Engineer for Scale Up Fabric](https://jobs.opennash.com/companies/astera-labs/jobs/0443cc7ea898148d1e5f/) San Jose ## Similar jobs at other companies ### [Hardware Validation and Voltage Characterization - Senior Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/4024a1ee475ca3ec1681/) Qualcomm · Bangalore, India ### [System Hardware Validation Engineer (All Levels) - Cork, Ireland](https://jobs.opennash.com/companies/qualcomm/jobs/e2e8e0a6e82a96fa3f9b/) Qualcomm · Cork, Ireland ### [Principal Hardware Architect - Microsoft Azure](https://jobs.opennash.com/companies/microsoft/jobs/2ccda2461bfa7ab21430/) Microsoft · Israel, Haifa, Tel Aviv ### [Senior Hardware Validation Engineer](https://jobs.opennash.com/companies/nxp-semiconductors/jobs/33deca54810efc7e2f27/) NXP Semiconductors ### [Hardware Verification and Validation Engineer](https://jobs.opennash.com/companies/ge-healthcare-technologies/jobs/348356a0aa278ad26629/) GE HealthCare Technologies · Bengaluru, Karnātaka, India OpenNash lists jobs from employers’ own careers sites and does not handle applications. Dates come from the employer where stated; “first seen” and “last checked” are our own observations. OpenNash Jobs · Official listings with dates and links to the employer. [Weekly hiring report](/reports/hiring/) · [Methodology](/methodology/)