[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All Arista Networks jobs](https://jobs.opennash.com/companies/arista-networks/) · [Search jobs](/search/) Arista Networks · Santa Clara, CA # Hardware Design Integrity Engineer Santa Clara, CA, United States Full-time $130,000 to $225,000 Design Listed on Arista Networks’s official careers site. Posted September 4, 2026. Check that it is still open and apply there. [Apply on Arista Networks’s careers site →](https://jobs.smartrecruiters.com/AristaNetworks/744000147594338-hardware-design-integrity-engineer) [OpenNash Jobs](https://jobs.opennash.com/) / [Arista Networks](https://jobs.opennash.com/companies/arista-networks/) / Hardware Design Integrity Engineer ## Job description Who You’ll Work With Working closely with cross-functional teams including software, product management, and manufacturing, our engineers innovate on system architectures, high-speed PCB designs, and signal integrity to deliver state-of-the-art products that drive network performance and reliability. ### What You'll Do Our Hardware Engineering team is at the forefront of developing high-speed networking and Ethernet products used in Enterprise campuses, hyperscaler datacenters and bleeding edge AI clusters. With this comes complex, oftentimes cross-platform issues requiring engineers passionate about debugging and delivering root cause analysis and fixes to the design team, executives, and customers. Candidates for this position would be responsible for debugging production system problems and delivering solutions. Deep dive into various aspects of any existing hardware design - CPU/ASIC, power, SI, clocking, PCIE, optics, fab, components. Work closely with sw & customer teams on high pressure escalations from the field, including reading logs, identifying the bug, determining the best fix with minimal interruption to the field, delivering the final solution, determining if any other systems are susceptible, and implementing measures to prevent the issue from occurring again. Writing scripts to look for specific information in the logs or to capture information in live debug sessions Work closely with the hw design team, but also be able to make firmware, schematic, BOM, fab changes as needed. Lab measurements and debug. Work closely with component, FA, ODM teams to identify component level or third party RCAs and fixes needed. Identify test escapes. Work with the design validation team to examine current test limitations and develop new tests. Write and present root cause analysis for executives and customers. ## Qualifications BSEE or MSEE 5+ years of relevant experience in hardware engineering Experience debugging Networking Hardware Experience with proper design of 20+ layer count boards featuring 50G+ signals Experience debugging and validating multi-phase DC/DC’s for high current, high transient loads Experience with design and debug of high speed interfaces (DDR, PCIe) as well as low speed signals (I2C, SPI) Familiarity with signal integrity and power integrity concepts and tools, such as: impedance, PDN’s, Bode plots, PCIE analyzers, TDR’s, VNA’s FPGA design using Verilog Compensation Information: The new hire base pay for this role has a salary range of $130,000 to $225,000. Arista offers different pay ranges based on work location, so that we can offer consistent and competitive pay appropriate to the market. The actual base pay offered will be based on a wide range of factors, including skills, qualifications, relevant experience, and work location. The pay range provided reflects base pay only and in addition certain roles may also be eligible for discretionary Arista bonuses and equity. Employees in Sales roles are eligible to participate in Arista’s Sales Incentive Plan, which pays commissions calculated as a percentage of eligible sales. US-based employees are also entitled to benefits including medical, dental, vision, wellbeing, tax savings and income protection. The recruiting team can share more details during the hiring process specific to the role and location. #LI-AC1 ## At a glance - Posted by the employer: Sep 4, 2026 - First seen by OpenNash: Jul 10, 2026 - Last checked: Oct 17, 2026 - Listed for: 99 days - Location: Santa Clara, CA, United States - Employment type: Full-time - Pay: $130,000 to $225,000[Apply on Arista Networks’s careers site →](https://jobs.smartrecruiters.com/AristaNetworks/744000147594338-hardware-design-integrity-engineer) ## More jobs at Arista Networks ### [FPGA Design Engineer](https://jobs.opennash.com/companies/arista-networks/jobs/76998ba751a7396e5ce7/) Santa Clara, CA, United States ### [Mechanical Design Engineer (Tooling Design Focus)](https://jobs.opennash.com/companies/arista-networks/jobs/067497ce4258f271bc23/) Santa Clara, CA, United States ### [Senior Hardware Design Engineer, Ethernet Switching](https://jobs.opennash.com/companies/arista-networks/jobs/d12c9787c28cf3cccc49/) Santa Clara, CA, United States ### [Senior PCB Design Engineer](https://jobs.opennash.com/companies/arista-networks/jobs/12c66e16ad0150a7c75e/) Santa Clara, CA, United States ### [BIOS Senior/Lead Software Engineer](https://jobs.opennash.com/companies/arista-networks/jobs/3503762717cbfd4c01cf/) Santa Clara, CA, United States ## Similar jobs at other companies ### [Hardware Engineer Stf/ Digital Design](https://jobs.opennash.com/companies/lockheed-martin/jobs/f4e1a8002ca8a210de04/) Lockheed Martin · Owego, NY ### [Senior Electrical Hardware Design Engineer](https://jobs.opennash.com/companies/general-dynamics/jobs/d65304e0b2a329d9aa54/) General Dynamics · Dedham, MA, US ### [#Hardware Design Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/14cb65e89af044710f99/) Qualcomm · San Diego, California, United States of America ### [Senior Electrical Hardware Design Engineer](https://jobs.opennash.com/companies/bae-systems/jobs/47588c76e482c7f46175/) BAE Systems · Westminster, Colorado, United States ### [iPad Hardware Systems Design Engineer - Signal Integrity](https://jobs.opennash.com/companies/apple/jobs/d8c1a65fee767d03e174/) Apple · Austin, United States of America OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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