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Apple

# Design Verification Engineer

Cupertino, United States of America Design 

Listed on Apple’s official careers site. Posted October 8, 2026. Check that it is still open and apply there.
[Apply on Apple’s careers site →](https://jobs.apple.com/en-us/details/200687828/design-verification-engineer)

[OpenNash Jobs](https://jobs.opennash.com/) / [Apple](https://jobs.opennash.com/companies/apple/) / Design Verification Engineer

## Job description

Join an accomplished team at Apple developing custom integrated circuits for Apple’s existing and future product lines. As a member of our mixed signal ASIC team, you will be responsible for verifying complex digital IP’s. You will work with the system architects and digital designers, making block level specifications clear and precise. You will use the specifications to build verification plans to exercise the functional, performance, stress cases, and error conditions in your blocks.

You will own the creation of the verification testbenches, using formal verification and UVM based simulation. Then you will build the testcases using System Verilog Assertions and constrained random UVM testcases to get complete functional and code coverage for your blocks.

## At a glance
- Posted by the employer: Oct 8, 2026
- First seen by OpenNash: Oct 11, 2026
- Last checked: Oct 11, 2026
- Listed for: 3 days
- Location: Cupertino, United States of America[Apply on Apple’s careers site →](https://jobs.apple.com/en-us/details/200687828/design-verification-engineer)

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OpenNash lists jobs from employers’ own careers sites and does not handle applications.
Dates come from the employer where stated; “first seen” and “last checked” are our own observations.

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