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Apple

# ASIC Design Engineer - Cache Controller

Santa Clara, United States of America Design 

Listed on Apple’s official careers site. Posted April 10, 2026. Check that it is still open and apply there.
[Apply on Apple’s careers site →](https://jobs.apple.com/en-us/details/200657223/asic-design-engineer-cache-controller)

[OpenNash Jobs](https://jobs.opennash.com/) / [Apple](https://jobs.opennash.com/companies/apple/) / ASIC Design Engineer - Cache Controller

## Job description

Apple is building the world’s fastest highly parallel mobile processing systems. Our high-bandwidth multi-client memory subsystems are blazing new territory with every generation. As we increase levels of parallelism, bandwidth and capacity, we are presented with design challenges exacerbated by clients with varying but simultaneous needs such as real-time, low latency, and high-bandwidth. In this role, you will work on crafting special purpose cache and controller which is part and parcel of the SOC memory hierarchy.

## At a glance
- Posted by the employer: Apr 10, 2026
- First seen by OpenNash: Jul 10, 2026
- Last checked: Oct 18, 2026
- Listed for: 191 days
- Location: Santa Clara, United States of America[Apply on Apple’s careers site →](https://jobs.apple.com/en-us/details/200657223/asic-design-engineer-cache-controller)

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OpenNash lists jobs from employers’ own careers sites and does not handle applications.
Dates come from the employer where stated; “first seen” and “last checked” are our own observations.

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