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Apple

# SoC UPF Methodology Engineer

Cupertino, United States of America Operations 

Listed on Apple’s official careers site. Posted April 10, 2026. Check that it is still open and apply there.
[Apply on Apple’s careers site →](https://jobs.apple.com/en-us/details/200657087/soc-upf-methodology-engineer)

[OpenNash Jobs](https://jobs.opennash.com/) / [Apple](https://jobs.opennash.com/companies/apple/) / SoC UPF Methodology Engineer

## Job description

Are you passionate about crafting solutions to intricate challenges? Join the Low Power group at Silicon Technologies and contribute to the development of cutting-edge technology and capabilities for low-power chip design. Your work will fuel Apple’s next-generation chips! You’ll play a crucial role in exploring AI/ML to design the workflow for the next generation of UPF. Additionally, you’ll refine our existing UPF framework and ensure its seamless integration and rigorous verification across our mobile products.

You will be part of an exciting silicon design group that is responsible for designing state-of-the-art ASICs. We have an extraordinary opportunity for Power UPF Engineers, who will drive transistor level power ERC sign-off and power intent-UPF implementation & verification on mobile SOCs.

## At a glance
- Posted by the employer: Apr 10, 2026
- First seen by OpenNash: Jul 10, 2026
- Last checked: Oct 18, 2026
- Listed for: 191 days
- Location: Cupertino, United States of America[Apply on Apple’s careers site →](https://jobs.apple.com/en-us/details/200657087/soc-upf-methodology-engineer)

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OpenNash lists jobs from employers’ own careers sites and does not handle applications.
Dates come from the employer where stated; “first seen” and “last checked” are our own observations.

OpenNash Jobs · Official listings with dates and links to the employer. [Weekly hiring report](/reports/hiring/) · [Methodology](/methodology/)