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Apple

# CAD Engineer – Design Verification Methodology

San Francisco Bay Area, United States of America Design 

Listed on Apple’s official careers site. Posted April 15, 2026. Check that it is still open and apply there.
[Apply on Apple’s careers site →](https://jobs.apple.com/en-us/details/200658106/cad-engineer-design-verification-methodology)

[OpenNash Jobs](https://jobs.opennash.com/) / [Apple](https://jobs.opennash.com/companies/apple/) / CAD Engineer – Design Verification Methodology

## Job description

Do you love building elegant solutions to highly complex challenges? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You’ll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you’ll be responsible for crafting and building the technology that fuels Apple’s devices.

Together, you and your team will enable our customers to do all the things they love with their devices!

## At a glance
- Posted by the employer: Apr 15, 2026
- First seen by OpenNash: Jul 10, 2026
- Last checked: Oct 18, 2026
- Listed for: 186 days
- Location: San Francisco Bay Area, United States of America[Apply on Apple’s careers site →](https://jobs.apple.com/en-us/details/200658106/cad-engineer-design-verification-methodology)

## More jobs at Apple

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### [Design Verification Engineer](https://jobs.opennash.com/companies/apple/jobs/cdfd10bbd828c56e63ec/)

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### [Front-End CAD Methodology Engineer – Design/DV Interface](https://jobs.opennash.com/companies/apple/jobs/66300b0d4859dd2f8f53/)

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OpenNash lists jobs from employers’ own careers sites and does not handle applications.
Dates come from the employer where stated; “first seen” and “last checked” are our own observations.

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