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Apple

# SoC Power Modeling Engineer

Cupertino, United States of America Operations 

Listed on Apple’s official careers site. Posted February 5, 2026. Check that it is still open and apply there.
[Apply on Apple’s careers site →](https://jobs.apple.com/en-us/details/200645446/soc-power-modeling-engineer)

[OpenNash Jobs](https://jobs.opennash.com/) / [Apple](https://jobs.opennash.com/companies/apple/) / SoC Power Modeling Engineer

## Job description

Do you have a passion for crafting new solutions? As part of our Silicon Engineering group, you will generate ideas and turn them into reality. You will be part of the team responsible for designing state-of-the-art ASICs that are integral to many Apple products. We are looking for an engineer who will work on the modeling of power dissipation of various IPs including AI/ML and the corresponding power rails, peak current requirements and voltage-frequency operating points for upcoming generations of Apple SOCs.

This role provides an opportunity to participate in optimization of a variety of leading edge chips for power-efficiency. You will collaborate across many teams including architecture, design, thermals, PMIC and system design to model power and current profiles for various IPs of the SOC, and the voltages-frequency operating points. The job also involves partnering with the lab and silicon characterization/validation and technology teams on correlating the models to the HW data.

## At a glance
- Posted by the employer: Feb 5, 2026
- First seen by OpenNash: Jul 10, 2026
- Last checked: Oct 18, 2026
- Listed for: 255 days
- Location: Cupertino, United States of America[Apply on Apple’s careers site →](https://jobs.apple.com/en-us/details/200645446/soc-power-modeling-engineer)

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Dates come from the employer where stated; “first seen” and “last checked” are our own observations.

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