[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All Analog Devices jobs](https://jobs.opennash.com/companies/analog-devices/) · [Search jobs](/search/) Analog Devices # Senior Manager, Digital Design Engineering China, Shanghai, Pudong, ZuChongzhi Manager or lead Design Listed on Analog Devices’s official careers site. Listed as of October 18, 2026. Check that it is still open and apply there. [Apply on Analog Devices’s careers site →](https://analogdevices.wd1.myworkdayjobs.com/External/job/China-Shanghai-Pudong-ZuChongzhi/Senior-Manager--Digital-Design-Engineering_R264590-1) [OpenNash Jobs](https://jobs.opennash.com/) / [Analog Devices](https://jobs.opennash.com/companies/analog-devices/) / Senior Manager, Digital Design Engineering ## Job description About Analog Devices Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.com and on LinkedIn and X. About the Role We are seeking an experienced, hands-on Senior Digital Design Manager to lead digital IC development for cutting-edge optical control ICs in AI data center and cloud infrastructure applications. This role combines deep technical leadership with strong team and project execution ownership. The successful candidate will guide a team of digital designers from architecture definition through RTL implementation, integration, verification support, and tape-out, while driving quality, schedule predictability, and cross-functional alignment. ### Key Responsibilities Technical Leadership Lead digital RTL design for complex IP blocks and chip-top/subsystem integration. Drive key architecture and micro-architecture decisions, including performance, power, area, timing, reliability, and integration trade-offs. Own digital design execution from architecture definition through RTL delivery, synthesis readiness, timing closure support, and tape-out. Conduct regular design reviews to ensure high-quality implementation, robust documentation, and disciplined issue closure. Project Execution Define and manage project plans, milestones, schedules, dependencies, and risk mitigation strategies for digital design activities. Proactively identify technical and cross-functional risks that may impact quality, schedule, or product objectives, and drive them to resolution. Partner closely with system, analog/mixed-signal, verification, firmware, physical design, test, and product engineering teams to ensure smooth SoC integration and execution. Team Leadership Lead, mentor, and grow a high-performing digital design team by providing technical direction, execution guidance, and career development support. Foster a culture of technical excellence, ownership, collaboration, accountability, and continuous improvement. Improve team processes, review practices, and design methodology to strengthen execution efficiency and engineering quality. ### Required Qualifications M.S. or Ph.D. degree in Microelectronics, Electrical Engineering, Computer Engineering, or a related field. 8+ years of experience in digital IC or SoC design, with demonstrated ownership of complex IP blocks, subsystems, or full-chip designs. Strong hands-on expertise in digital architecture, RTL design, micro-architecture definition, and mixed-signal SoC integration. Solid understanding of digital design flows, including synthesis, static timing analysis, clock/reset strategy, CDC/RDC considerations, and physical implementation handoff. Good understanding of block-level and system-level verification methodologies, with the ability to collaborate effectively with verification teams on coverage, debug, and sign-off readiness. Proven experience leading projects and managing engineers, with a clear track record of driving execution, resolving technical challenges, and delivering through major milestones. Excellent communication and stakeholder-management skills, with the ability to align technical teams and communicate clearly across global cross-functional organizations. Self-driven, resilient, and comfortable operating in a fast-paced AI data center product development environment. Strong written and verbal English communication skills. For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process. Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group. ### Job Req Type Experienced Required Travel: Yes, 10% of the time Shift Type: 1st Shift/Days ## At a glance - Posted by the employer: Not stated - First seen by OpenNash: Oct 11, 2026 - Last checked: Oct 18, 2026 - Listed for: 7 days - Location: China, Shanghai, Pudong, ZuChongzhi[Apply on Analog Devices’s careers site →](https://analogdevices.wd1.myworkdayjobs.com/External/job/China-Shanghai-Pudong-ZuChongzhi/Senior-Manager--Digital-Design-Engineering_R264590-1) ## More jobs at Analog Devices ### [Analog Design Engineer](https://jobs.opennash.com/companies/analog-devices/jobs/8ff65757973b5f90d029/) China, Shanghai, Pudong, ZuChongzhi ### [Digital Design Engineer](https://jobs.opennash.com/companies/analog-devices/jobs/88832e0b1b6e674abbc5/) China, Shanghai, Pudong, ZuChongzhi ## Similar jobs at other companies ### [Chef de Projet – Mise en conformité Digital Control System et Automate France France ENGINEERING / DESIGN STUDIES / METHODS ENGINEERING / DESIGN STUDIES / METHODS](https://jobs.opennash.com/companies/vinci/jobs/e1653f62481c9e80e3cd/) VINCI · France ### [Senior Mechanical Design Engineer - Digital Engineering PACS](https://jobs.opennash.com/companies/siemens/jobs/e8a3256e57cb3c2b94b4/) Siemens ### [FY27 Intern - MSIP Digital Design Engineering Internship - Canada (16 months)](https://jobs.opennash.com/companies/qualcomm/jobs/eaf99e54589e30198ace/) Qualcomm · Toronto, Ontario, Canada ### [Digital Transformation & Adoption Coordinator Rueil-Malmaison, Ile-de-France Rueil-Malmaison, Ile-de-France ENGINEERING / DESIGN STUDIES / METHODS ENGINEERING / DESIGN STUDIES / METHODS Fixed-term contract](https://jobs.opennash.com/companies/vinci/jobs/791ac310e14e10aa7fcb/) VINCI · Rueil-Malmaison, France, DE, ILE ### [FY27 Intern - MSIP Digital Design Verification Engineering Internship - Canada (16 months)](https://jobs.opennash.com/companies/qualcomm/jobs/c6a33a55fdf698fb8d47/) Qualcomm · Toronto, Ontario, Canada OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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