[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All Analog Devices jobs](https://jobs.opennash.com/companies/analog-devices/) · [Search jobs](/search/) Analog Devices · Multiple locations # Principal Engineer, Design Verification Multiple locations Senior individual contributor Design Listed on Analog Devices’s official careers site. Listed as of October 18, 2026. Check that it is still open and apply there. [Apply on Analog Devices’s careers site →](https://analogdevices.wd1.myworkdayjobs.com/External/job/United-Kingdom-Edinburgh-SC-Freer/Principal-Engineer--Design-Verification_R253235) [OpenNash Jobs](https://jobs.opennash.com/) / [Analog Devices](https://jobs.opennash.com/companies/analog-devices/) / Principal Engineer, Design Verification ## Job description About Analog Devices Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible™. Learn more at www.analog.com and on LinkedIn and Twitter (X). ### Job Description The charter of ADI’s CSS team is to lead the market in selected technology domains with highly differentiated sensing and signal processing solutions. Today these technology areas include Capacitive Sensing, Optical Image Stabilization, Power management and Audio that drive growth in our portable and non-portable consumer business. As part of our global operation and expanding business needs, we are now seeking to fill key roles in defining, developing and implementing verification solutions for mixed signal ICs in this key market area. This would span the entire development cycle from concept phase, through verification planning, implementation, execution, and release of products to customers. The Design Verification Engineer will collaborate with the wider ADI technical community which affords an opportunity to work with many business units in ADI with exposure to many technologies and products Responsibilities Based in United Kingdom (Newbury, Edinburgh) Or Valencia Spain, this position will be responsible for contributing to: Verification of complex designs and sub-systems using leading edge verification methodologies Contribute to and Influence the decisions on methodologies/strategies to be adopted for design verification. Develop testbench architectures and develop using UVM or Formal based verification approaches. Define verification-plans, functional coverage, tests and verification methodology for block/chip-level verification. Work with the design team in generating verification-plans and closure metrics. Debugging of Gate Level Simulation (GLS), waiving Timing Violations approved by designer Continuous interaction with analog co-sim and firmware team. Technically mentor and guide junior verification engineers on SoC Verification. Support post-silicon verification activities of the products working with design, product evaluation and applications engineering team Lead verification efforts at IP or SoC level, effort estimation, project scheduling and tracking, task assignment, reporting to management or customer. ### Qualifications Bachelor's or master’s degree, in Engineering (Electronic Engineering) or equivalent Building and leading small verification teams. Strong interpersonal, teamwork and communication skills are essential. Be self-motivated and enthusiastic. Strong level of English speaking and writing. Customer facing experience as verification lead Experience in both IP and SoC level verification. Strong demonstrable knowledge of verification-plan generation, coverage analysis, constrained random techniques, assertion based and formal verification techniques with System Verilog. Demonstrated experience in verification techniques for one or more of the following DSP/Processor subsystems/Formal verification Expert in developing unit and SoC level test benches using UVM. Integrate the block testbench in chip-level UVM environment and verify integration. Excellent debugging and analytical skills. Proficiency in scripting languages and utilities including Makefile, Python, TCL/tsh, Perl etc. 10-15 years in ASIC design verification. ### Additional Preferred Qualifications Experience with HW emulation or FPGA prototyping Low power methodologies, e.g. UPF Experience in behavioural modelling of analogue circuits Experience in verifying processor based designs Knowledge of interface protocols e.g. AHB/APB/AXI/I2C/SPMI #LI-RW1 For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process. Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group. ### Job Req Type Experienced Required Travel: Yes, 10% of the time Shift Type: 1st Shift/Days ## At a glance - Posted by the employer: Not stated - First seen by OpenNash: Jul 10, 2026 - Last checked: Oct 18, 2026 - Listed for: 100 days - Location: Multiple locations[Apply on Analog Devices’s careers site →](https://analogdevices.wd1.myworkdayjobs.com/External/job/United-Kingdom-Edinburgh-SC-Freer/Principal-Engineer--Design-Verification_R253235) ## More jobs at Analog Devices ### [Analog Design Engineer](https://jobs.opennash.com/companies/analog-devices/jobs/a1b3e3bdfa53f789a596/) ### [Analog Design Engineer Intern](https://jobs.opennash.com/companies/analog-devices/jobs/421db025bd111e0f3220/) ### [Design Evaluation Engineer Intern](https://jobs.opennash.com/companies/analog-devices/jobs/1835cabfbdaed3291f6f/) ### [Principal Design Evaluation Engineer](https://jobs.opennash.com/companies/analog-devices/jobs/e9b8896b95b4407a8b62/) ### [Senior Principal Analog / Mixed-Signal Design Engineer](https://jobs.opennash.com/companies/analog-devices/jobs/f9675ad0c6da2d53663b/) ## Similar jobs at other companies ### [Staff Engineer - FPGA Design/Verification](https://jobs.opennash.com/companies/ge-aerospace/jobs/b7e1af6ad4b2d3dbd5f0/) GE Aerospace ### [Principal Formal Design Verification Engineer](https://jobs.opennash.com/companies/microsoft/jobs/77157c255f58687bb52b/) Microsoft · India, Karnataka, Bangalore ### [RISCV CPU Design Verification Principal Manager/ Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/312f1b332fbcaab058e8/) Qualcomm · Bangalore, India ### [SoC Design Verification Engineer (Up to Principal Level)](https://jobs.opennash.com/companies/qualcomm/jobs/07fc1a63fb397059f4c8/) Qualcomm · Ho Chi Minh, Hồ Chí Minh, Vietnam ### [Design Verification Engineer](https://jobs.opennash.com/companies/siemens/jobs/3469736e66b7ab53255d/) Siemens OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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