[Skip to main content](#main-content) [ OpenNash ](https://opennash.com/) / [Jobs](https://jobs.opennash.com/) [ 01 Search jobs](https://jobs.opennash.com/search/)[ 02 Companies](https://jobs.opennash.com/explore/)[ 03 Hiring report](https://jobs.opennash.com/reports/hiring/)[ 04 AI assistants](https://jobs.opennash.com/connect/)[ 05 How it works](https://jobs.opennash.com/methodology/) Amazon · Seattle, WA # Sr. Manager, Post-Silicon Eng, AWS Hardware Engineering Services US, WA, Seattle Manager or lead Operations Listed on Amazon’s official careers site. Posted October 21, 2026. Check that it is still open and apply there. [Apply on Amazon’s careers site →](https://www.amazon.jobs/en/jobs/10585890/sr-manager-post-silicon-eng-aws-hardware-engineering-services) [OpenNash Jobs](https://jobs.opennash.com/) / [Amazon](https://jobs.opennash.com/companies/amazon/) / Sr. Manager, Post-Silicon Eng, AWS Hardware Engineering Services ## Job description Amazon Web Services designs and builds the servers and custom silicon that power the world's largest cloud. The Core Hardware team owns the cross-cutting engineering capabilities that every server product depends on: power delivery, PCIe connectivity, signal integrity, CPU and memory quality, board design, thermal and mechanical systems, and the test and quality infrastructure that validates and sustains all of it. We are looking for a Senior Manager to lead engineering teams within Core Hardware. This is a manager-of-managers role. Your organization owns PCIe validation and signal integrity, CPU and memory quality engineering, server performance, and test automation infrastructure. These teams are responsible not only for validating that every server platform meets the highest bar for silicon quality, interconnect reliability, and system performance before production, but also for owning the ongoing quality and operational health of those subsystems once they are deployed in the fleet. This is a technical leadership role with real depth and end-to-end ownership. Your teams operate at the intersection silicon, servers and the fleet, and that boundary does not disappear at production release. They validate PCIe connectivity at the physical and protocol layer, find and resolve bugs in shipped silicon, characterize server performance at scale, build the automation infrastructure that makes all of this repeatable, and then own the outcomes when those platforms are running in production. When a fleet-wide issue surfaces that traces back to silicon, interconnect, or memory behavior, your organization owns the response: root cause, corrective action, and the systemic fix that prevents recurrence. The right leader for this role brings deep fluency in post-silicon validation and uses that fluency to drive outcomes across the full lifecycle, from first silicon through fleet operations. ### Key job responsibilities - Own the end-to-end technical output and operational health of engineering teams spanning PCIe validation and signal integrity, CPU and memory engineering, server performance, and test automation, from silicon bring-up through fleet deployment and ongoing operations. - Lead first-line managers and set the technical direction for validation methodology and fleet engineering, ensuring that validation plans, coverage models, debug workflows, and production monitoring strategies reflect the complexity of Amazon's custom server platforms and silicon. - Build the processes and tooling that connect what your teams learn in validation to how they operate in the fleet, closing the loop between pre-production findings and production outcomes. - Drive root-cause analysis and corrective action for issues that surface at any point in the lifecycle, whether during bring-up, qualification, or in the production fleet. When a fleet-wide issue traces back to silicon, interconnect, or memory behavior, your organization owns the technical response end-to-end: diagnosis, root cause, fix, and the systemic improvement that prevents recurrence. - Partner with silicon suppliers, firmware, and hardware design teams to drive cross-functional resolution of platform-level issues that span silicon, firmware, board, and operational boundaries. - Represent your organization's technical findings, fleet health posture, and risk assessments to senior leadership with the depth and clarity expected at the director level and above, translating complex silicon and platform data into actionable decisions for product teams, fleet operations, and architecture teams. - Build and develop a team of managers engineers who think beyond validation and own outcomes in the fleet, developing the institutional knowledge and end-to-end mindset that Amazon's ownership model demands. ## At a glance - Posted by the employer: Oct 21, 2026 - First seen by OpenNash: Oct 25, 2026 - Last checked: Nov 8, 2026 - Listed for: 18 days - Location: US, WA, Seattle[Apply on Amazon’s careers site →](https://www.amazon.jobs/en/jobs/10585890/sr-manager-post-silicon-eng-aws-hardware-engineering-services) ## Hiring at Amazon - Open jobs: 21,930 - New in the last 7 days: After two weekly collections - Tracked since: Jul 10, 2026 [All Amazon jobs](https://jobs.opennash.com/companies/amazon/) · [Weekly hiring report](/reports/hiring/) ## More jobs at Amazon ### [Sr. Mgr Liquid Cooling Ops, AWS Hardware Engineering Services](https://jobs.opennash.com/companies/amazon/jobs/d87f32462a4b2564af09/) US, WA, Seattle ### [Sr. Manager, Software Development, ML Network Stack - Annapurna Labs](https://jobs.opennash.com/companies/amazon/jobs/ebdb5f1853e819514a8d/) US, WA, Seattle ### [Sr. Manager, Software Development, Prime Video](https://jobs.opennash.com/companies/amazon/jobs/46eae4cca367c788d27e/) US, WA, Seattle ### [Sr. Manager, Solutions Architecture — Communication Developer Services, AWS WWSO CDS](https://jobs.opennash.com/companies/amazon/jobs/ade4f33295843c71c98a/) US, WA, Seattle ### [Sr. Manager, TPM, Alexa Connections](https://jobs.opennash.com/companies/amazon/jobs/862835b4beee18c3e6e5/) US, WA, Seattle ## Similar jobs at other companies ### [High-speed Electrical/Optical Post-Silicon Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/593b5252e7099d717575/) Qualcomm · San Diego, California, United States of America ### [Sr. Post-Silicon Validation Engineer, RF/Mixed-Signal](https://jobs.opennash.com/companies/qualcomm/jobs/bef5c10f661a76093247/) Qualcomm · San Diego, California, United States of America ### [Lead Pre-Silicon Verification & Post-Silicon Validation Architect](https://jobs.opennash.com/companies/advanced-micro-devices-amd/jobs/131b226134a8a37b5939/) Advanced Micro Devices (AMD) · Austin, Texas ### [Post-Silicon Validation and Methodology Engineer](https://jobs.opennash.com/companies/nvidia/jobs/4cd2b9d22467b000ba46/) NVIDIA · US, CA, Santa Clara ### [Pre/Post Silicon Validation Engineer](https://jobs.opennash.com/companies/meta-platforms/jobs/2598bd455808e8251015/) Meta Platforms · Sunnyvale, CA +1 more [Jobs in Seattle, WA](/locations/us/wa/seattle/)[Jobs in Washington](/locations/us-wa/)[Operations jobs](/functions/operations/) OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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