[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All Amazon jobs](https://jobs.opennash.com/companies/amazon/) · [Search jobs](/search/) Amazon · San Diego, CA # Senior ASIC Design Engineer, Amazon Leo US, CA, San Diego Senior individual contributor Design Listed on Amazon’s official careers site. Posted April 7, 2026. Check that it is still open and apply there. [Apply on Amazon’s careers site →](https://www.amazon.jobs/en/jobs/10385600/senior-asic-design-engineer-amazon-leo) [OpenNash Jobs](https://jobs.opennash.com/) / [Amazon](https://jobs.opennash.com/companies/amazon/) / Senior ASIC Design Engineer, Amazon Leo ## Job description Amazon Leo is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. ### The Role Be part of Amazon Leo’s sub-team responsible for defining and implementing the digital chip SOCs for communications via Low Earth Orbit satellites and Amazon gateways. This is a unique opportunity to define a groundbreaking wireless solution with few legacy constraints. The team works with customer requirements and wireless system teams to define modems, high-speed interfaces, embedded processors, and DSP solutions in latest CMOS generation technologies. In this role you will: - Implement wireless system architecture in silicon from system specification to chip specification to RTL to optimizing timing / power to chip level validation - Develop solutions optimizing customer experience (throughput, latency, and availability) while meeting power and cost constraints - Drive high quality designs for first-time right silicon solutions, and meeting the power objectives - Create standalone verification test bench to verify the correctness of your block - Work with the verification team and participate in System level verification using test benches constructed using UVM, System C and DPI-C - Ensure that the block meets DFT, timing and power targets by working closely with the implementation team - Learn about requirements and solutions for systems operating in space - Drive trade-off analysis to benefit customer experience and optimization of resources (costs, power, spectrum) ### Export Control Requirement Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum. ## At a glance - Posted by the employer: Apr 7, 2026 - First seen by OpenNash: Oct 11, 2026 - Last checked: Oct 11, 2026 - Listed for: 187 days - Location: US, CA, San Diego[Apply on Amazon’s careers site →](https://www.amazon.jobs/en/jobs/10385600/senior-asic-design-engineer-amazon-leo) ## More jobs at Amazon ### [ASIC Design Engineer, Satellite Communication](https://jobs.opennash.com/companies/amazon/jobs/09c8c54fbd6dc5368cc0/) US, CA, San Diego ### [ASIC Design Verification Engineer, Amazon Leo](https://jobs.opennash.com/companies/amazon/jobs/d281fbe5b6515f4c615c/) US, CA, San Diego ### [ASIC Engineer - RF/DSP Systems Design, LEO](https://jobs.opennash.com/companies/amazon/jobs/71daf26c977e20829dbc/) US, CA, San Diego ### [Design Verification Tech Lead Engineer, Amazon Leo](https://jobs.opennash.com/companies/amazon/jobs/0ac513e6d66b8454a33e/) US, CA, San Diego ### [IC Packaging Design Engineer, Amazon Leo](https://jobs.opennash.com/companies/amazon/jobs/826e3cf140690a90f050/) US, CA, San Diego ## Similar jobs at other companies ### [ASIC & FPGA Design Engineer - E2](https://jobs.opennash.com/companies/lockheed-martin/jobs/4510ab87f7a931bd10e6/) Lockheed Martin · Liverpool, NY ### [ASIC & FPGA Design Engineer Sr](https://jobs.opennash.com/companies/lockheed-martin/jobs/90d5256c62b52a8fdb0d/) Lockheed Martin · Boulder, CO ### [ASIC Design Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/99c4aabaf2f51a99dc1b/) Qualcomm · San Diego, California, United States of America ### [Digital ASIC Design Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/208c975103db0801757a/) Qualcomm · San Diego, California, United States of America ### [ASIC Engineer, Design](https://jobs.opennash.com/companies/meta-platforms/jobs/2d28fad1bb22f8cc1093/) Meta Platforms · Sunnyvale, CA +1 more OpenNash lists jobs from employers’ own careers sites and does not handle applications. Dates come from the employer where stated; “first seen” and “last checked” are our own observations. OpenNash Jobs · Official listings with dates and links to the employer. [Weekly hiring report](/reports/hiring/) · [Methodology](/methodology/)