[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All Alphabet jobs](https://jobs.opennash.com/companies/alphabet/) · [Search jobs](/search/) Alphabet · Sunnyvale, CA # TPU Hardware Design Engineer, Cloud Sunnyvale, CA, USA Design Listed on Alphabet’s official careers site. Listed as of October 23, 2026. Check that it is still open and apply there. [Apply on Alphabet’s careers site →](https://www.google.com/about/careers/applications/jobs/results/109995971688964806-tpu-hardware-design-engineer-cloud) [OpenNash Jobs](https://jobs.opennash.com/) / [Alphabet](https://jobs.opennash.com/companies/alphabet/) / TPU Hardware Design Engineer, Cloud ## Job description info_outline About the job In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems. As an RTL Design Engineer on the TPU team, you will be a key contributor to the development of Google's AI accelerators. You will leverage your expertise in digital logic design, computer architecture, and RTL coding to create innovative and efficient hardware solutions. You will address challenging technical problems at the forefront of AI hardware, working in a dynamic and collaborative environment. You will join the team designing and developing the on-chip network of Google's next-generation Tensor Processing Units (TPUs), the custom-built accelerators powering our AI and machine learning workloads in data centers. You will be responsible for the microarchitecture, design, implementation, and integration of key digital logic blocks within the TPU. This role requires close collaboration with cross-functional teams, including Verification, Physical Design, Validation, and Firmware, to deliver hardware. You will own critical design deliverables, help with integration efforts, and contribute to the continuous improvement of our design methodologies and flows. The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide. We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more. Individual pay is determined by factors including job-related skills, experience, and relevant education or training. ### US $138000 - $197000 (USD) + 15% bonus target + equity + benefits Learn more about benefits at Google. ## At a glance - Posted by the employer: Not stated - First seen by OpenNash: Oct 13, 2026 - Last checked: Oct 23, 2026 - Listed for: 10 days - Location: Sunnyvale, CA, USA[Apply on Alphabet’s careers site →](https://www.google.com/about/careers/applications/jobs/results/109995971688964806-tpu-hardware-design-engineer-cloud) ## More jobs at Alphabet ### [ASIC Design Verification Manager, Google Cloud](https://jobs.opennash.com/companies/alphabet/jobs/27f42ee07299fede983e/) Sunnyvale, CA, USA ### [ASIC Design Verification Manager, TPU Compute](https://jobs.opennash.com/companies/alphabet/jobs/2269e917243514c253d7/) Sunnyvale, CA, USA ### [Electrical Design Engineer, Platforms](https://jobs.opennash.com/companies/alphabet/jobs/fd833f3c0c0554e10028/) Sunnyvale, CA, USA ### [Low Power Verification Engineer, Physical Design](https://jobs.opennash.com/companies/alphabet/jobs/4b344d60cc99579cb060/) Sunnyvale, CA, USA ### [Mechanical Product Design Engineer, Platforms](https://jobs.opennash.com/companies/alphabet/jobs/70ab8c21a0a608efac1f/) Sunnyvale, CA, USA ## Similar jobs at other companies ### [Hardware Engineer Stf/ Digital Design](https://jobs.opennash.com/companies/lockheed-martin/jobs/f4e1a8002ca8a210de04/) Lockheed Martin · Owego, NY ### [Senior Electrical Hardware Design Engineer](https://jobs.opennash.com/companies/general-dynamics/jobs/d65304e0b2a329d9aa54/) General Dynamics · Dedham, MA, US ### [#Hardware Design Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/14cb65e89af044710f99/) Qualcomm · San Diego, California, United States of America ### [Senior Electrical Hardware Design Engineer](https://jobs.opennash.com/companies/bae-systems/jobs/47588c76e482c7f46175/) BAE Systems · Westminster, Colorado, United States ### [Baseband Hardware Design Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/9ab8ac093069ebe2a80a/) Qualcomm · San Diego, California, United States of America OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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