[Skip to main content](#main-content) [ OpenNash ](https://opennash.com/) / [Jobs](https://jobs.opennash.com/) [ 01 Search jobs](https://jobs.opennash.com/search/)[ 02 Companies](https://jobs.opennash.com/explore/)[ 03 Hiring report](https://jobs.opennash.com/reports/hiring/)[ 04 AI assistants](https://jobs.opennash.com/connect/)[ 05 How it works](https://jobs.opennash.com/methodology/) Advanced Micro Devices (AMD) · Bangalore, India # Physical Design Engineer Bangalore, India Full-time Design Listed on Advanced Micro Devices (AMD)’s official careers site. Posted October 27, 2026. Check that it is still open and apply there. [Apply on Advanced Micro Devices (AMD)’s careers site →](https://global-external-amd.icims.com/jobs/90056/login) [OpenNash Jobs](https://jobs.opennash.com/) / [Advanced Micro Devices (AMD)](https://jobs.opennash.com/companies/advanced-micro-devices-amd/) / Physical Design Engineer ## Job description ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology can change lives for the better. It can heal us, entertain us, and make us more connected, productive, and understanding of the world around us. And we’re looking for talent who feel the same: people who want to leave the planet better than they found it, those who don’t shy away from humanity’s challenges but are determined to help solve them. AMD is powering the next generation of supercomputing, high-performance computing, cloud, and AI. Whether you’re designing next-gen processors, enabling AI breakthroughs, or creating go-to-market plans, every role at AMD contributes to something bigger — technology that moves the world forward. ### PHYSICAL DESIGN ENGINEER #The Role We are looking for a motivated and detail-oriented Physical Design Library Engineer to join our VLSI backend team. This role sits at the intersection of library management using CAD supported tools, and AI-driven automation — playing a critical enabling function for Front End & Back End team. You will own the end-to-end library delivery pipeline — from lib generation to tile owner unblocking — and will actively leverage and develop AI-powered tools and dashboards to improve team efficiency and visibility. ### Key Responsibilities Having 4+Years of experience in Physical Design #Library Flow Ownership - Own and execute the LibBuilder flow for standard cell and memory library generation - Drive MemView generation for memory compiler outputs across multiple PVT corners and process nodes - Maintain library quality and consistency across NDM, Liberty (.lib), LEF, and timing model deliverables - Track and manage PVT corner coverage — ensure all required corners (SS, FF, TT, low voltage, high temperature) are generated and validated ### Cross-Team Coordination - Serve as the primary point of contact for library-related issues raised by tile and block owners - Proactively follow up with internal teams (design, DFT, timing) and external teams (foundry, IP vendors, memory compiler vendors) to resolve library blockers - Unblock tile owners on NDM / PVT mismatch issues — diagnose root cause, coordinate fix, and validate resolution - Coordinate with CAD team to ensure the latest compiler versions, EDA tool updates, and flow scripts are adopted in a timely manner ### Debug and Issue Resolution - Perform basic to intermediate debug of library generation failures — identify issues in lib characterization, corner mapping, or MemView configuration - Triage and escalate complex issues to the right teams with clear problem statements and reproduction steps - Maintain a library issue tracker — log, prioritize, and close issues with documented root cause and fix #AI Tools and Dashboard Development - Comfortable working with AI-assisted tools (Genie, Claude Code, Copilot) for day-to-day productivity — querying, scripting, and automation - Develop, enhance, and maintain AI-generated dashboards for library health, flow status, and PVT coverage visibility - Proactively identify opportunities to automate repetitive library tasks using AI and scripting Knowledge of Physical Design Concepts -Timing concepts -Different file formats, lef/def/oasis Education: Bachelor’s or master’s degree in related discipline preferred #LI-SR5 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy. ## At a glance - Posted by the employer: Oct 27, 2026 - First seen by OpenNash: Aug 21, 2026 - Last checked: Nov 1, 2026 - Listed for: 72 days - Location: Bangalore, India - Employment type: Full-time[Apply on Advanced Micro Devices (AMD)’s careers site →](https://global-external-amd.icims.com/jobs/90056/login) ## Hiring at Advanced Micro Devices (AMD) - Open jobs: 1,273 - New in the last 7 days: After two weekly collections - Tracked since: Jul 10, 2026 [All Advanced Micro Devices (AMD) jobs](https://jobs.opennash.com/companies/advanced-micro-devices-amd/) · [Weekly hiring report](/reports/hiring/) ## More jobs at Advanced Micro Devices (AMD) ### [ASIC Physical Design & Implementation Lead](https://jobs.opennash.com/companies/advanced-micro-devices-amd/jobs/26678a9b0380ed7ddc83/) Bangalore, India ### [CPU Design Verification Engineer](https://jobs.opennash.com/companies/advanced-micro-devices-amd/jobs/14dfd873ee4918d5c1f7/) Bangalore, India ### [Embedded Linux Power and Performance Engineer](https://jobs.opennash.com/companies/advanced-micro-devices-amd/jobs/7c3b6d0b2ec67760e1d8/) Bangalore, India ### [IP Design Lead - Sr Staff](https://jobs.opennash.com/companies/advanced-micro-devices-amd/jobs/44f3afe8822a8f0b9f1d/) Bangalore, India ## Similar jobs at other companies ### [NPU Physical Design Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/916f75702172388c2ee7/) Qualcomm · Bangalore, India ### [Physical Design Engineer II](https://jobs.opennash.com/companies/microsoft/jobs/2d7f9c2e826bc117df12/) Microsoft · India, Karnataka, Bangalore ### [Silicon Physical Design CAD Engineer](https://jobs.opennash.com/companies/microsoft/jobs/d047141045a6e2b56e7a/) Microsoft · India, Karnataka, Bangalore ### [ASIC Engineer - Block Level Physical Design Engineer - Armenia - ETR](https://jobs.opennash.com/companies/cisco-systems/jobs/1d172182ef24e9a32db8/) Cisco Systems · Armenia OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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