[Skip to main content](#main-content) [ OpenNash ](https://opennash.com/) / [Jobs](https://jobs.opennash.com/) [ 01 Search jobs](https://jobs.opennash.com/search/)[ 02 Companies](https://jobs.opennash.com/explore/)[ 03 Hiring report](https://jobs.opennash.com/reports/hiring/)[ 04 AI assistants](https://jobs.opennash.com/connect/)[ 05 How it works](https://jobs.opennash.com/methodology/) Advanced Micro Devices (AMD) · Santa Clara, California # Lead Power Methodology Analysis Engineer Santa Clara, California Full-time Manager or lead Operations Listed on Advanced Micro Devices (AMD)’s official careers site. Posted October 22, 2026. Check that it is still open and apply there. [Apply on Advanced Micro Devices (AMD)’s careers site →](https://careers-amd.icims.com/jobs/93787/login) [OpenNash Jobs](https://jobs.opennash.com/) / [Advanced Micro Devices (AMD)](https://jobs.opennash.com/companies/advanced-micro-devices-amd/) / Lead Power Methodology Analysis Engineer ## Job description ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future. Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger — technology that moves the world forward. Join us and, together, we’ll advance your career. ### THE ROLE We are seeking an experienced engineer to develop next-generation power analysis, modeling, and optimization methodologies for complex semiconductor systems. This role spans the design lifecycle, from architectural exploration through implementation and silicon validation, with a focus on improving power efficiency, engineering productivity, and informed design decision-making. The position offers the opportunity to develop new methodologies, solve complex technical problems, collaborate across engineering disciplines, and influence the direction of future products and technologies. ### THE PERSON You have strong communication and presentation skills, demonstrated through technical publications, presentations, training, technical documentation, executive briefings, or similar forums. You collaborate effectively with colleagues across technical disciplines and levels of experience and are able to mentor others, share technical knowledge, and contribute to the collective expertise of the team. ### KEY RESPONSIBILITIES Develop methodologies for power analysis, modeling, correlation, and optimization. Create scalable frameworks, automation, and data-driven solutions for power evaluation and design optimization. Apply advanced analytics and AI/ML techniques to improve engineering workflows and product efficiency. Partner with architecture, design, verification, implementation, software, and silicon teams to address power and performance challenges. Lead technical initiatives that span multiple projects and engineering disciplines. Contribute to technical innovation through methodologies, patents, publications, internal knowledge sharing, or other appropriate channels. Mentor engineers, share technical knowledge, and help establish effective engineering practices. ### PREFERRED EXPERIENCE Significant experience in semiconductor design, power analysis, power optimization, performance analysis, or related areas. Strong understanding of modern ASIC and SoC development methodologies. ### Experience in one or more of the following Power modeling and estimation RTL and architecture-level power analysis Power-performance optimization Workload-driven analysis Physical design power optimization Silicon power characterization AI/ML applications for engineering productivity and power optimization Strong analytical, problem-solving, collaboration, and communication skills. Experience leading complex technical projects and collaborating across teams and disciplines. ### ACADEMIC CREDENTIALS MS or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent relevant industry experience. This role is not eligible for visa sponsorship. #LI-DP1 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy. ## At a glance - Posted by the employer: Oct 22, 2026 - First seen by OpenNash: Oct 25, 2026 - Last checked: Nov 1, 2026 - Listed for: 10 days - Location: Santa Clara, California - Employment type: Full-time[Apply on Advanced Micro Devices (AMD)’s careers site →](https://careers-amd.icims.com/jobs/93787/login) ## Hiring at Advanced Micro Devices (AMD) - Open jobs: 1,273 - New in the last 7 days: After two weekly collections - Tracked since: Jul 10, 2026 [All Advanced Micro Devices (AMD) jobs](https://jobs.opennash.com/companies/advanced-micro-devices-amd/) · [Weekly hiring report](/reports/hiring/) ## More jobs at Advanced Micro Devices (AMD) ### [2027 Masters Thermal Engineering Intern/Co-Op](https://jobs.opennash.com/companies/advanced-micro-devices-amd/jobs/050c29ac21ccca94a142/) Santa Clara, California ### [2027 Undergrad Thermal Engineering Intern/Co-Op](https://jobs.opennash.com/companies/advanced-micro-devices-amd/jobs/cbf01e70bfe70f61b749/) Santa Clara, California ### [AI / ML DFT Project Lead](https://jobs.opennash.com/companies/advanced-micro-devices-amd/jobs/e104620ed93c3285f69a/) Santa Clara, California ### [AI Engineer, Recursive Self-Improvement for Compute](https://jobs.opennash.com/companies/advanced-micro-devices-amd/jobs/5e4db79f33ed709027ae/) Santa Clara, California ### [ASIC Emulation Engineer](https://jobs.opennash.com/companies/advanced-micro-devices-amd/jobs/b39ed9509792936b6d6e/) Santa Clara, California ## Similar jobs at other companies ### [Low Power Design/Methodology Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/bca7be857c43dba101a7/) Qualcomm · Tijuana, Baja California, Mexico ### [ASIC Timing and Methodology Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/9a3a66e840e1ae3025fb/) Qualcomm · Tijuana, Baja California, Mexico ### [Staff Engineer Digital Verification and Methodology](https://jobs.opennash.com/companies/infineon-technologies/jobs/d9074188ee6fe932ddd6/) Infineon Technologies · Lexington, KY ### [Senior Staff Engineer, Digital Verification and Methodology](https://jobs.opennash.com/companies/infineon-technologies/jobs/be667633209f920a219e/) Infineon Technologies · Lexington, KY, USA ### [Senior DFT Power Methodology Engineer](https://jobs.opennash.com/companies/nvidia/jobs/2f1ef76bd8351745880b/) NVIDIA · US, CA, Santa Clara OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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