[Skip to main content](#main-content) [OpenNash Jobs](https://jobs.opennash.com/) [Hiring report](/reports/hiring/) · [All Advanced Micro Devices (AMD) jobs](https://jobs.opennash.com/companies/advanced-micro-devices-amd/) · [Search jobs](/search/) Advanced Micro Devices (AMD) · Santa Clara, California # Sr Director, Silicon Performance and Design Execution Santa Clara, California Full-time Director Design Listed on Advanced Micro Devices (AMD)’s official careers site. Posted June 30, 2026. Check that it is still open and apply there. [Apply on Advanced Micro Devices (AMD)’s careers site →](https://careers-amd.icims.com/jobs/86804/login) [OpenNash Jobs](https://jobs.opennash.com/) / [Advanced Micro Devices (AMD)](https://jobs.opennash.com/companies/advanced-micro-devices-amd/) / Sr Director, Silicon Performance and Design Execution ## Job description WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE The Sr Director of Silicon Performance and Design Execution is responsible for owning end to end silicon performance and design execution across post-silicon phases. This role provides technical and organizational leadership for system-level performance attainment, hardware/software optimizations, silicon debug, and sustained performance delivery for complex SoCs and accelerators. The Sr Director drives cross functional alignment across architecture, design, validation, software, and product teams to ensure performance, power, and efficiency targets are met for current and future products. THE PERSON In this role you would manage a global organization of ~30+ engineers, with growth potential to 50+. Direct impact on product competitiveness, customer performance outcomes, and long term silicon roadmap success. ### KEY RESPONSIBILITIES Drive end-to-end performance leadership for AI/ML workloads, including workload selection, characterization, simulation, performance projection, root-cause analysis, and attainment across pre-silicon and post-silicon phases, partnering closely with Architecture, Software, Hardware Engineering, and Product teams. Provide leadership in AI workloads across LLMs, LDMs and Ranking & recommendation engines to identify key features in DC GPU, software frameworks and parallelization techniques. Develop organizational capabilities to scale workloads for performance enhancements and architecture leadership at AI cluster level. Provide direction for system profiling, analysis to identify performance bottlenecks for rack scale and AI clusters. Outline strategic influence on architecture features for DC GPU products and software optimizations from AI workload analysis at scale. ### PREFERRED EXPERIENCE Recognized leader in AI/ML performance engineering with hands-on experience in LLM, generative AI, and large-scale training/inference workloads across GPU-accelerated systems, including performance modeling, benchmarking, and architecture evaluation. Deep experience in Data Center GPU leading performance architecture for compute, memory and communications for AI workloads. Expertise in Systems Architecture and performance optimizations for AI workloads, modeling, parallelization techniques in hardware design and software frameworks. Knowledge in AI software components and frameworks – Pytorch, vLLM, SGLang, JAX, TensorFlow, Transformer Engine and ONNX for software optimizations. ### ACADEMIC CREDENTIALS Bachelors or Masters degree in electrical or computer engineering LOCATION: San Jose CA (primary) will consider Austin TX #LI-DKDAMD1 This role is not eligible for visa sponsorship. ### Benefits offered are described AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy. ## At a glance - Posted by the employer: Jun 30, 2026 - First seen by OpenNash: Jul 10, 2026 - Last checked: Oct 18, 2026 - Listed for: 110 days - Location: Santa Clara, California - Employment type: Full-time[Apply on Advanced Micro Devices (AMD)’s careers site →](https://careers-amd.icims.com/jobs/86804/login) ## More jobs at Advanced Micro Devices (AMD) ### [ASIC Design Engineer - Networking/ DPU/ AI Systems](https://jobs.opennash.com/companies/advanced-micro-devices-amd/jobs/8170471d209c489eb822/) Santa Clara, California ### [CPU Core Physical Design Thermal Modeling Lead](https://jobs.opennash.com/companies/advanced-micro-devices-amd/jobs/18dd61dd1450e77dba87/) Santa Clara, California ### [Design Verification Engineer](https://jobs.opennash.com/companies/advanced-micro-devices-amd/jobs/72553cf32a721a100038/) Santa Clara, California ## Similar jobs at other companies ### [Director, Silicon Design](https://jobs.opennash.com/companies/microsoft/jobs/67533ea7eb702f4d22ed/) Microsoft · United States, North Carolina, Raleigh, California, Mountain View ### [CPU Post-Silicon Performance Engineer](https://jobs.opennash.com/companies/qualcomm/jobs/03f6ef03d4d6c2b9f952/) Qualcomm · Santa Clara, California, United States of America ### [Senior FPGA/Silicon Design Engineer](https://jobs.opennash.com/companies/microsoft/jobs/64971b5dd3f0b00b95e0/) Microsoft · United States, Washington, Redmond, California, Mountain View ### [Director, Product Management - Data Center Custom AI Silicon](https://jobs.opennash.com/companies/qualcomm/jobs/16034a7da3cd9b0269df/) Qualcomm · Santa Clara, California, United States of America ### [Senior Manager, Silicon Speed Productization — Silicon Co-Design Group](https://jobs.opennash.com/companies/nvidia/jobs/54555d12322550b3f84f/) NVIDIA · US, CA, Santa Clara OpenNash lists jobs from employers’ own careers sites and does not handle applications. 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